Privacy

About us

Write

Contact

Engineering

Arts & Science

Medical

Law

Polytechnic

School

Research

HomeANNOUNCEMENTFive Day FDP on Digital VLSI Design and Verification Organized by Bangalore...

Five Day FDP on Digital VLSI Design and Verification Organized by Bangalore Institute of Technology (BIT)

Applications are invited from interested and eligible candidates for the following Positions. Interested Eligible candidates fulfilling the criteria may submit their applications in the prescribed format along with the detailed CV / As per the Norms.

EVENT RECRUITMENT 2021 | FACULTY TICK

Date of Advertisement: 18-08-2021


🏠 NAME OF THE INSTITUTION

BANGALORE INSTITUTE OF TECHNOLOGY (BIT)

🎪 EVENT NAME

Five Day Faculty Development Program on Digital VLSI Design and Verification


🏫 ABOUT INSTITUTION

Bangalore Institute of Technology (BIT), one of the premier institute imparting Quality education was established in the year 1979 by Rajya Vokkaligara Sangha. BIT is approved by AICTE and affiliated to VTU. The institute offers 10 UG, 9 PG & 13 Ph.D Programs. 9 UG programs and MCA program are accredited by NBA. The Institution is ranked in 201-250 band by NIRF-India Ranking-2020.

🏫 ABOUT DEPARTMENT

Department of Electronics and Communication Engineering was established in the year 1979. Department is offering Under Graduate Program, Electronics and Communication Engineering with an intake of 180 students and Master of Technology (M.Tech) in VLSI Design and Embedded Systems with an intake of 18 students and M.Tech in Digital Electronics and Communication with an intake of 24 students. Department Research center is recognized by VTU and offers Ph.D program. Department UG & PG students have obtained 50+ University Ranks. Department of ECE was accredited by National Board of Accreditation (NBA) in the Year 2005, 2009 and 2019.


🎯 EVENT OVERVIEW

This 5-Day FDP on “Digital VLSI Design and Verification” enrich the knowledge in field of VLSI Design Engineering.
This FDP is organized and conducted in Association with Top Industry experts which includes brainstorming
session on theoretical concepts followed by Cadence Tool Demonstration. The focus of this Five Day FDP will be on
the cutting-edge Technologies like:
➢ On-Chip Design
➢ Clock Domain Crossing
➢ Functional Verification using Cadence
➢ Code Coverage & Functional Coverage
➢ Synthesis and Physical Design Implementation

Dear Participants !!!!!
Warm Welcome !
Greetings from the Bangalore Institute of Technology (BIT) , Department of Electronics & Communication Engineering
It’s our pleasure to welcome you all for the Five Day FDP on “Digital VLSI Design and Verification “from 3rd to 27th August 2021, in association with in association with Entuple Technologies & IEEE-BIT CAS .

Event Programme Register Link: Use below QR-Code

🏆 ORGANIZED BY

Bangalore Institute of Technology (BIT) , Department of Electronics & Communication Engineering in association with Entuple Technologies & IEEE-BIT CAS is organising 5-Day FDP on “Digital VLSI Design and Verification” 23rd to 27th August 2021

#DateTechnical ExpertsTopicSession Timings
  INAUGURATION (9:30am to 10:00am)  
123-08-2021 (Monday)Mr. Aloke Kumar Das (Keynote Speaker) Director of Labs & Lectures and Business Consulting – Frenus Tech & AugsthaApps LabsOn-Chip Design with Open-Source toolsMorning 10:00am to 12:00pm
224-08-2021 (Tuesday)Mr. Venkat Krishna Technical Head- AARK. 1C TechnologiesClock Domain CrossingMorning 10:00am to 12:00pm
325-08-2021 (Wednesday)Ms. Saraswathi B P PD Engineer-CADENCE, Entuple Technologies & Mr. L V Kedharnath FAE-CADENCE, Entuple TechnologiesFunctional VerificationMorning 10:00am to 12:00pm
   Ms. Saraswathi B P PD Engineer-CADENCE, Entuple Technologies & Mr. L V Kedharnath FAE-CADENCE, Entuple Technologies Tool DemonstrationAfternoon 1:30pm to 3:30pm
426-08-2021 (Thursday)Ms. Saraswathi B P PD Engineer-CADENCE, Entuple Technologies & Mr. L V Kedharnath FAE-CADENCE, Entuple TechnologiesCode Coverage & Functional CoverageMorning 10:00am to 12:00pm
   Ms. Saraswathi B P PD Engineer-CADENCE, Entuple Technologies & Mr. L V Kedharnath FAE-CADENCE, Entuple Technologies Tool DemonstrationAfternoon 1:30pm to 3:30pm
527-08-2021 (Friday)Ms. Saraswathi B P PD Engineer-CADENCE, Entuple Technologies & Mr. L V Kedharnath FAE-CADENCE, Entuple TechnologiesSynthesis and Physical Design ImplementationMorning 10:00am to 12:00pm
   Ms. Saraswathi B P PD Engineer-CADENCE, Entuple Technologies & Mr. L V Kedharnath FAE-CADENCE, Entuple Technologies Tool DemonstrationAfternoon 1:30pm to 3:30pm
  VALEDICTORY (3:30pm to 4:00pm)  

🎓 ELIGIBILITY

The program is open to PG and Ph.D Research Scholars, Members of Faculty of various engineering disciplines , science & Mathematics background from reputed institutes, Scientists , Government Bodies, Industries, R&D
organizations.


💰 REGISTRATION FEE

NO REGISTRATION FEES.


📌 ADDRESS FOR COMMUNICATION

+91 9972645595
+91 9743388258


📝 HOW TO APPLY

Registration Link: ttps://forms.gle/GcxCXsxPGSHohhNi8

 E-Certificate will be issued to all Active Participants upon submission of Feedback Form.

If you have already registered, Kindly ignore this email. 

Interested participants fulfilling the above criteria may submit their Register applications in the prescribed format along with the details. Kindly Register using the link given below ttps://forms.gle/GcxCXsxPGSHohhNi8

  • Registered Participants will get the link of both the sessions through mail to join the event.
  • All attendees will get E-Certificate those who attend both sessions.
  • Seats are limited and Registrations will be on First Come First Serve Basis. 
  • The feedback form will be available at the end of the sessions.

Note: E-certificate will be issued to the participants who have attended the program for all sessions.

  • Workshop is open to all students, faculty members, research scholars, industry person
  • Registration on basis of First Come First Serve
  • E-Certificate for all participants who attend both sessions and fill feedback form

📅 EVENT DATE

Event Date 23rd to 27th August 2021
Interested participants can submit the Registration application form in the prescribed format along with the details for the training and workshop


🏁 CONTACT INFORMATION

📱 PHONE NUMBER

+91 9972645595 +91 9743388258

🌐 WEBSITE

Click Here


📫 ADDRESS FOR COMMUNICATION

Bangalore Institute of Technology (BIT), Krishna Rajendra Rd, Parvathipuram, Vishweshwarapura, Basavanagudi, Bengaluru, Karnataka 560004, INDIA


📜 OFFICIAL SOURCE / REFERENCE

Official Notification By Programme Co-Ordinator


Copyrights © 2021 Facultytick 

This work is licensed under a Creative Commons Attribution 4.0 International License.

🔔 Get Free Job Alerts in Your Email – Subscribe Now

You will not be charged to receive job alerts in your Email. It’s totally FREE. Why wait subscribe it now.

To get daily free job alert for all Government Teaching jobs, Private Teaching Jobs, Research Jobs, Conference, Workshop, FDP Details in your Email, enter your email below.

RELATED TAG

MOST POPULAR

LATEST POST

More

    MONTH WISE POST